1. Field of the Invention
The present invention relates to packaging substrates and fabrication methods thereof, and more particularly, to a packaging substrate having embedded capacitors and a fabrication method thereof.
2. Description of Related Art
Along with the rapid development of semiconductor packaging technologies, different package types have been developed for semiconductor devices. To reduce the height of packages so as to meet the miniaturization or thinning requirement of products, semiconductor components are generally embedded in cavities of packaging substrates so as to reduce the volume of the overall semiconductor devices and improve the electrical performance.
FIGS. 1A to 1D are schematic cross-sectional views showing a fabrication method of a packaging substrate 1 having an embedded capacitor according to the prior art. Referring to FIG. 1A, a substrate 1a is provided, which has a core layer 10 having opposite first and second surfaces 10a, 10b, a cavity 100 in communication with the first and second surfaces 10a, 10b of the core layer 10 and a circuit layer 101 formed on the first and second surfaces 10a, 10b of the core layer 10. The core layer 10 further has a plurality of conductive through holes 102 formed therein for electrically connecting the circuit layer 101 on the first and second surfaces 10a, 10b. 
Then, a capacitor 11 is disposed in the cavity 100. The capacitor 11 has electrode pads 110a, 110b disposed at left and right ends thereof, respectively.
Referring to FIG. 1B, a first dielectric material 14a is formed on the first surface 10a of the core layer 10, on an upper side of the capacitor 11 and in a portion of the cavity 100.
Referring to FIG. 1C, a second dielectric material (not shown) is pressed to the second surface 10b of the core layer 10, on a lower side of the capacitor 11 and in the cavity 100 so as to be combined with the first dielectric material 14a to form a dielectric layer 14, thereby securing in position the capacitor 11 in the dielectric layer 14.
Referring to FIG. 1D, a built-up structure 16 is formed on the dielectric layer 14 and electrically connecting the capacitor 11. The built-up structure 16 has a built-up dielectric layer 160, a built-up circuit layer 161 formed on the built-up dielectric layer 160 and a plurality of conductive vias 162 formed in the built-up dielectric layer 160 for electrically connecting the built-up circuit layer 161, the circuit layer 101 and the electrode pads 110a, 110b of the capacitor 11.
Thereafter, an insulating protection layer 17 is formed on the built-up structure 16 and has a plurality of openings 170 formed therein for exposing portions of the built-up structure 16.
However, limited by the area of the core layer 10 and the design of the circuit layer 101 and the built-up circuit layer 161, the single core layer 10 can only be embedded with one layer of the capacitor 11. Therefore, such a packaging substrate has limited functions and accordingly cannot meet the multi-function requirement.
On the other hand, in order to meet the multi-function requirement, several packaging substrates can be stacked on one another, which, however, leads to an increase in height of the overall structure. As such, the structure cannot meet the miniaturization or thinning requirement.
Therefore, there is a need to provide a packaging substrate having embedded capacitors and a fabrication method thereof so as to overcome the above-described drawbacks.